1. Technical Field
This invention involves techniques for increasing the grain size of polycrystalline materials especially with a view toward improving the device-worthy characteristics of thin semiconductor films.
2. Disclosures of Interest
With the development of evermore sophisticated integrated circuitry and the concomitant heavy reliance on MOS-related technology, the use of thin film semiconductors on insulating substrates promises to become a preferred alternative to the current bulk semiconductor configuration. The insulating substrate, which is usually amorphous, provides dielectric isolation thereby lowering deleterious capacitive coupling, providing enhanced radiation tolerance, and removing CMOS latchup. Further advantages accrue when the insulating dielectric is a thin film and is placed over a conducting substrate. This latter configuration, of a thin film semiconductor on a thin dielectric all over a conducting substrate, results in a well-placed ground plane further improving device-worthy characteristics.
While the most sophisticated devices using semiconductor-insulator-conductor configurations require single crystal semiconductors, it has recently become apparent that large-grained polycrystalline semiconductor is adequate for many device applications. However, preferred CVD deposition of semiconductor material on an insulating substrate results in a fine-grained polycrystalline structure yielding slow devices due to the lowered mobility associated with numerous grain boundaries. Nevertheless, it has recently been shown that various techniques may be used to increase the grain size of the CVD deposited polycrystalline material to a level which would render the material satisfactory for many device applications.
Initial studies on increasing grain size of polycrystalline materials involved the use of scanning electron beams (J. Maserjian, Solid State Electron, 6, 477 (1963)). While such studies indicated that significant increase in grain size can be obtained, there was no clear indication that device-worthy characteristics would thereby result. Later studies on the possibility of increasing grain size through the use of laser scanning, similarly, did not emphasize the device applications to which the process might be applied. Recently, however, Gibbons has shown that scanning a fine-grained polycrystalline semiconductor with an appropriate laser would result in increased grain size to the point that device-worthy characteristics could be obtained. (Laser and Electron Beams Processing of Electronic Materials, Vol. 80-1, The Electrochemical Society, Princeton, N. J., 1980, pp. 1-25.) This work has been carried further by D. K. Biegelsen et al with the use of a scanning laser whose spot is imaged into a "crescent" configuration (Laser and Electron Beam Solid Interaction and Materials Processing, Gibbons et al, eds., Elsevier North Holland Publishing Co., 1981, p. 487). Biegelsen and his coworkers claim that further enhancement in grain size could be obtained using this configuration.